收藏本站
W949D6CB / W949D2CB
512Mb Mobile LPDDR
8.4 IDD Specification Parameters and Test Conditions
8.4.1 IDD Specification Parameters and Test Conditions
(X16)
PARAMETER
Operating one
bank active-
precharge
current
SYMBOL
IDD0
TEST CONDITION
tRC = tRCmin ; tCK = tCKmin ; CKE is HIGH; CS is HIGH between valid
commands; address inputs are SWITCHING; data bus inputs are
STABLE
-5
40
-6
38
- 75
35
UNIT
mA
Precharge
power-down
standby current
Precharge
power-down
standby current
with clock stop
IDD2P
IDD2PS
all banks idle, CKE is LOW; CS is HIGH, tCK = tCKmin ;
address and control inputs are SWITCHING; data bus inputs
are STABLE
all banks idle, CKE is LOW; CS is HIGH, CK = LOW, CK =
HIGH; address and control inputs are SWITCHING; data bus
inputs are STABLE
Low
power
Normal
power
Low
power
Normal
power
0.6
0.8
0.6
0.8
0.6
0.8
0.6
0.8
0.6
0.8
0.6
0.8
mA
mA
Precharge non
power-down
standby current
IDD2N
all banks idle, CKE is HIGH; CS is HIGH, tCK = tCKmin; address and
control inputs are SWITCHING; data bus inputs are STABLE
10
10
10
mA
Precharge non
power-down
standby current
with clock stop
Active power-
down standby
current
IDD2NS
IDD3P
all banks idle, CKE is HIGH; CS is HIGH, CK = LOW, CK = HIGH;
address and control inputs are SWITCHING; data bus inputs are STABLE
one bank active, CKE is LOW; CS is HIGH, tCK = tCKmin;address and
control inputs are SWITCHING; data bus inputs are STABLE
3
3
3
3
3
3
mA
mA
Active power-
down standby
current with
clock stop
Active non
power-down
standby current
IDD3PS
IDD3N
one bank active, CKE is LOW; CS is HIGH, CK = LOW, CK = HIGH;
address and control inputs are SWITCHING; data bus inputs are STABLE
one bank active, CKE is HIGH; CS is HIGH, tCK = tCKmin; address
and control inputs are SWITCHING; data bus inputs are STABLE
3
25
3
25
3
25
mA
mA
Active non
power-down
standby current
with clock stop
Operating burst
read current
Operating burst
write current
Auto-Refresh
Current
Deep Power-
Down current
IDD3NS
IDD4R
IDD4W
IDD5
IDD8(4)
one bank active, CKE is HIGH; CS is HIGH, CK = LOW, CK = HIGH;
address and control inputs are SWITCHING; data bus inputs are STABLE
one bank active; BL = 4; CL = 3; tCK = tCKmin ; continuous read bursts;
IOUT = 0 mA; address inputs are SWITCHING; 50% data change each
burst transfer
one bank active; BL = 4; t CK = t CKmin ; continuous write
bursts; address inputs are SWITCHING; 50% data change each burst
transfer
tRC = tRFCmin ; tCK = tCKmin ; burst refresh; CKE is HIGH; address and
control inputs are SWITCHING; data bus inputs are STABLE
Address and control inputs are STABLE; data bus inputs are STABLE
15
75
55
75
10
15
70
50
75
10
15
70
50
75
10
mA
mA
mA
mA
uA
Publication Release Date: Sep, 21, 2011
- 48 -
Revision A01-007
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
W971GG6JB25I IC DDR2 SDRAM 1GBIT 84WBGA
W971GG8JB-25 IC DDR2 SDRAM 1GBIT 60WBGA
W9725G6IB-25 IC DDR2-800 SDRAM 256MB 84-WBGA
W9725G6JB25I IC DDR2 SDRAM 256MBIT 84WBGA
W9725G6KB-25I IC DDR2 SDRAM 256MBIT 84WBGA
W972GG6JB-3I IC DDR2 SDRAM 2GBITS 84WBGA
W9751G6IB-25 IC DDR2-800 SDRAM 512MB 84-WBGA
W9751G6KB-25 IC DDR2 SDRAM 512MBIT 84WBGA
相关代理商/技术参数
W949D2CBJX5ETR 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ
W949D2CBJX5I 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA
W949D2CBJX5I TR 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ, INDUST
W949D2CBJX6E 制造商:Winbond Electronics Corp 功能描述:DRAM Chip Mobile LPDDR SDRAM 512M-Bit 16Mx32 1.8V 90-Pin VFBGA
W949D2CBJX6ETR 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 166MHZ, 65NM
W949D2CBJX6G 制造商:WINBOND 制造商全称:Winbond 功能描述:512Mb Mobile LPDDR
W949D2KBJX5E 制造商:Winbond Electronics Corp 功能描述:512M MDDR, X32, 200MHZ 制造商:Winbond Electronics Corp 功能描述:IC MEMORY
W949D2KBJX5I 制造商:Winbond Electronics Corp 功能描述:IC MEMORY